arm assembly work book { incomplete }

This is some of my rough works.
adc r2, r0, r1  ; r2 = r0 + r1 + carry bit

Arm architecture reference manual.pdf is a good reference for to learn ARM Architecture.

The subroutine return is performed by copying R14 back to the program counter.
This is typically done in one of the two following ways:
MOV PC,LR
BX LR

Page Rank.... Google....

This was the topic that I have selected for my PG-diploma  Seminar. It is actually google's pagerank algorithm developed by Larry Page and later joined by Sergey Brin, together they implemented Google. So here I am publishing my ppt which I compiled for the seminar.

What is boot code and stack initialisation in ARM

[Click here to download a sample complete project for arm. It uses gnuarm's arm-elf- toolchain for compilation and qemu emulator for to emulate]

This post is very much linked with my previous post arm-elf toolchain rough notes of my works...
Actually on powerON or reset, arm will start fetching and executing instructions from 0x00000000. As arm processes 32 bit instructions, each time PC is incremented by 4. like 0x00000000 0x00000004 0x0000000C like that....

android good links

Goto the following link for a very good explenation of broadcastreceiver
http://mobiforge.com/developing/story/sms-messaging-android
to write a broadcast receiver for phone calls goto following link
http://thinkandroid.wordpress.com/2010/02/02/custom-intents-and-broadcasting-with-receivers/

arm-elf- toolchain rough notes of my works......

scratches of my arm works... This is my rough backup.
This post explains how to develop a ready to run assembly code which works on an arm board from scratch. This includes boot.s crt.s and app.s.

an overview of arm board with mini2440

Mini2440 uses the samsung processor S3C2440 (arm7tdmi) from samsung. 

Processor S3C2440

Flash: 2MB NOR or 64MB(128, 256) NAND. Selected using S2 switch.

SDRAM: 2 Nos - 32MB each So total 64MB. Which has a 32 bit data bus width for maximum speed. Chip select nGCS6 places the SDRAM in 0 x 3000 0000.

Use JTAG Interface to program NOR flash with supervivi bios.

Features of my interest....

CPU digest.

DMA Controller: It contains source address, destination address and the count of words going to transfer between source and destination. One problem that can occur due to this is cache coherency.

Intel C8237 is a DMA chip.

Java Com API settings. ( access comm port through java )

Get comm.jar, win32com.dll, javax.comm.properties files.
Then follow the steps.

1. copy comm.jar to jre/bin
2. copy win32comm.dll to jre/bin
3. copy javax.comm.properties to jre/lib

So that is it.... It is tea time... bye....