arm-elf- toolchain rough notes of my works......

scratches of my arm works... This is my rough backup.
This post explains how to develop a ready to run assembly code which works on an arm board from scratch. This includes boot.s crt.s and app.s.

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here is the boot.s
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;/* file  @ boot.s  */

.code 32
.text

.global _start
.global __start

.extern initilize_stack

;/* Entry Point of the programe  */
_start:
__start:


;/* Start of the vector table */

b       RESET_HANDLER
b       UNDEF_HANDLER
b       SWI_HANDLER
b       PREFETCH_ABORT_HANDLER
b       DATA_ABORT_HANDLER
b       RESERVED_HANDLER
b       IRQ_HANDLER
        FIQ_HANDLER:subs pc,r14,#4


;/* Exceptions handlers */

RESET_HANDLER           :       b initilize_stack

UNDEF_HANDLER           :       movs pc,r14

SWI_HANDLER             :       movs pc,r14

PREFETCH_ABORT_HANDLER  :       subs pc,r14,#4

DATA_ABORT_HANDLER      :       subs pc,r14,#8

RESERVED_HANDLER        :

IRQ_HANDLER             :       subs pc,r14,#4

.end

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Here is the crt.s

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.code 32
.text
.equ ABT,        0x17
.equ FIQ,        0x11
.equ IRQ,        0x12
.equ SVC,        0x13
.equ SYS,        0x1F
.equ UND,        0x1B
.equ USR,        0x10
.equ M_MODE,     0x1F
.global initilize_stack
.extern main
;/*Initilization of the stack for all the Modes */
initilize_stack :
;SUPERVISOR_MODE
        ldr SP,=0x1000
;ABORT_MODE
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r0,r0,#ABT
        msr CPSR,r0
        ldr SP,=0x2000
;FIQ_MODE
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r1,r0,#FIQ
        msr CPSR,r0
;IRQ_MODE
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r0,r0,#IRQ
        msr CPSR,r0
        ldr SP,=0x4000
;SYSTEM
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r0,r0,#SYS
        msr CPSR,r0
        ldr SP,=0x5000
;UNDEFINED
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r0,r0,#UND
        msr CPSR,r0
        ldr r13,=0x6000
;USER
        mrs r0,CPSR
        bic r0,r0,#M_MODE
        orr r0,r0,#USR
        msr CPSR,r0
        ldr SP,=0x7000
        b main
.end

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And here comes the app.s code
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;/* PROGRAM TO ------------------ */
;ARM CODE 
.code 32                ;word align
.text
.global main
;/* Application code for assembly starts here */
main:
loop:   b loop
.end

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This is my Makefile
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result.elf: boot.o crt.o app.o
        arm-elf-ld -o result.elf boot.o crt.o app.o -Ttext=0
boot.o: boot.s
        arm-elf-as -D -ahlms --gstabs -mcpu=arm7tdmi  -o boot.o boot.s >t
crt.o: crt.s
        arm-elf-as -D -ahlms --gstabs -mcpu=arm7tdmi  -o crt.o crt.s >t
app.o: app.s
        arm-elf-as -D -ahlms --gstabs -mcpu=arm7tdmi  -o app.o app.s >t
binary: result.elf
        arm-elf-objcopy -O binary result.elf result.bin
flash: result.bin
        dd if=/dev/zero of=flash.bin bs=4096 count=4096
        dd if=result.bin of=flash.bin bs=4096 conv=notrunc
clean: 
        rm -rf boot.o crt.o app.o t result.elf result.bin flash.bin

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This is my compile and emulate in qemu bash script q-emu.sh ( or any name you can use )

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#!/bin/bash
make
make binary
make flash
qemu-system-arm -M connex -pflash flash.bin -nographic -serial /dev/null

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now just ./q-emu.sh then at (qemu) type info registers 

Notes: arm-elf-gcc is used as follows


c_app.o: c_app.c
        arm-elf-gcc -mcpu=arm7tdmi  -O2 -g -c app.c -o app.o
        arm-elf-gcc -mcpu=arm7tdmi -mthumb -O2 -g -c app.c  -o app.o  ;this shows  warning: interworking not enabled. while linking(arm-eld-ld) and arm-elf-insight of app.o not working properly.